An improvement and a fast DSP implementation of the bit flipping algorithms for low density parity check decoder

نویسندگان

چکیده

<span lang="EN-US">For low density parity check (LDPC) decoding, hard-decision algorithms are sometimes more suitable than the soft-decision ones. Particularly in high throughput and speed applications. However, there exists a considerable gap performances between these two classes of favor algorithms. In order to reduce this gap, work we introduce new improved versions algorithms, adaptative gradient descent bit-flipping (AGDBF) reliability ratio weighted GDBF (ARRWGDBF). An weighting correction factor is introduced each case improve allowing an important gain bit error rate. As second contribution real time implementation proposed solutions on digital signal processors (DSP) performed optimize performance approchs. The results numerical simulations DSP reveal faster convergence with processing reduction consumed memory resources when compared For irregular LDPC code, our approachs achieves gains 0.25 0.15 dB respectively for AGDBF ARRWGDBF algorithms.</span>

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ژورنال

عنوان ژورنال: International Journal of Power Electronics and Drive Systems

سال: 2021

ISSN: ['2722-2578', '2722-256X']

DOI: https://doi.org/10.11591/ijece.v11i6.pp4774-4784